Introduction
One of our longstanding Industrial PC and CompactPCI customers was looking for a smaller-footprint, modular architecture for their next generation of deep packet inspection (DPI) equipment. Typically, DPI identifies individual streams of traffic on a per-user and per-application basis, allowing policy enforcement of quality of service (QOS) and security as well as service quality logging. DPI essentially provides visibility and control to service providers so they can see what is traversing their networks and take appropriate action.

DPI applications include traffic management of peer-to-peer (P2P) flows to prevent bandwidth hogging, network security, service enhancements such as content filtering as well as resource and admission control systems for video stream availability based on network load.

Solution
The system examines the data and header part of a packet as it passes an inspection point andprovides the ability to look at all data from Layer 2 through Layer 7 of the OSI model. This includes headers and data protocol structures as well as the actual payload of the message. The DPI identifies and classifies the traffic based on a signature database that includes information extracted from the data part of a packet, allowing much finer control than classification based only on header information. The chosen system needed to fit in a reduced 3U height and be able to scale its packet processing power according to network bandwidth. Mutiple network connection types and a scalable number of physical connections needed to be accomodated. A custom MicroTCA system was designed to provide the density and necessary infrastructure to support expandable high speed WAN and LAN connectivity, and between two and six processor AMC blades for wire-speed packet analysis.

System
The customer selected a 3U MicroTCA system based on a custom-developed 12-slot chassis and six MIC-5601 Processor AMCs. The 10 GbE Controllers and OC-3/STM1 boards were developed specifically by the customer and associated 3rd parties. Advantech's UTCA-5503 provides the MicroTCA Carrier Hub management and GbE switching between all elements with a 10GbE version under definition. Only one MCH is required as redundancy and high availability is not needed. For logging purposes, two SATA/SAS drives provide for up to 1/2 a terabyte of packet recording. The system provides one further slot for connection to four T1/E1's should this become a service provider requirement at a later date. Future versions of the Processor AMC with Intel Core 2 Duo based Processor AMCs are currently in design at Advantech for the next generation system. The availability of both AC and DC versions of the chassis were key to customer deployment in central offices as well as data centers.

Benefits
 

•  Globalized R&Dwith Local Project Management for engineer-to-engineer support in the same time zone
•  Access to innovative new technology allows early market entry for hi-density next generation system
•  Scalable design allows processing performance and I/O matching